The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

Jan. 30, 2008
Applicants:

Anna Charny, Sudbury, MA (US);

David Tsiang, Menlo Park, CA (US);

Mohammed Ismael Tatar, Kanata, CA;

John Bettink, San Jose, CA (US);

David Getchell, Castro Valley, CA (US);

Clarence Filsfils, Brussels, BE;

Inventors:

Anna Charny, Sudbury, MA (US);

David Tsiang, Menlo Park, CA (US);

Mohammed Ismael Tatar, Kanata, CA;

John Bettink, San Jose, CA (US);

David Getchell, Castro Valley, CA (US);

Clarence Filsfils, Brussels, BE;

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/173 (2006.01); G06F 15/16 (2006.01); H04L 12/56 (2006.01);
U.S. Cl.
CPC ...
H04L 47/10 (2013.01); H04L 47/125 (2013.01);
Abstract

In one embodiment, an apparatus generally comprises one or more input interfaces for receiving a plurality of flows, a plurality of output interfaces, and a processor operable to identify large flows and select one of the output interfaces for each of the large flows to load-balance the large flows over the output interfaces. The apparatus further includes memory for storing a list of the large flows, a pinning mechanism for pinning the large flows to the selected interfaces, and a load-balance mechanism for selecting one of the output interfaces for each of the remaining flows. A method for local placement of large flows to assist in load-balancing is also disclosed.


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