The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

Aug. 07, 2009
Applicants:

Satoshi Horiuchi, Osaka, JP;

Takaharu Yamada, Osaka, JP;

Yuhko Hisada, Osaka, JP;

Ryohki Itoh, Osaka, JP;

Inventors:

Satoshi Horiuchi, Osaka, JP;

Takaharu Yamada, Osaka, JP;

Yuhko Hisada, Osaka, JP;

Ryohki Itoh, Osaka, JP;

Assignee:

Sharp Kabushiki Kaisha, Osaka-shi, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
Abstract

A high-quality display is achieved by suppressing a disturbance in alignment in a liquid crystal display panel including a substrate structured so that a slit in a pixel electrode intersects with a scanning signal line or an auxiliary capacitor line. An active matrix substrate () includes: a pixel electrode () having a slit; and an auxiliary capacitor line (). In a region of intersection between the slit () and the auxiliary capacitor line () or a scanning signal line (), at least a drain line () or a data signal line () is provided between a layer of the pixel electrode () and a layer of the auxiliary capacitor line () or of the scanning signal line () in such a way as to cover the auxiliary capacitor line () or the scanning signal line ().


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