The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

Oct. 08, 2012
Applicant:

Broadcom Corporation, Irvine, CA (US);

Inventor:

Jeffrey Harrison, Carlingford, AU;

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A FIRDAC with a return-to-zero or return-to-open drive uses multiple DACs receiving delayed copies of a digital input data signal to reduce thermal noise and intersymbol interference to produce a summed analog output. The SNR of sigma-delta ADCs using current-source-based DACs is significantly limited by the thermal noise of the DAC current sources. DACs using a switched voltage connected via a resistor or other passive element are quieter, but in a non-return-to-zero configuration tend to suffer from intersymbol interference if used at GHz clock frequencies. The intersymbol interference can be avoided by using a return-to-zero or return-to-open drive using multiple DACs clocked on successive half clock cycles (a finite-impulse-response DAC).


Find Patent Forward Citations

Harrison, Jeffrey. (2014). Firdac with rtz/rto voltage-mode elements (U.S. Patent No. 8736475). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8736475

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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