The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2014
Filed:
Aug. 28, 2012
Tsung-lin Chen, Taipei, TW;
Edward Yi Chang, Hsinchu, TW;
Wei-hua Chieng, Hsinchu, TW;
Stone Cheng, Hsinchu, TW;
Shyr-long Jeng, Hsinchu, TW;
Shin-wei Huang, New Taipei, TW;
Tsung-Lin Chen, Taipei, TW;
Edward Yi Chang, Hsinchu, TW;
Wei-Hua Chieng, Hsinchu, TW;
Stone Cheng, Hsinchu, TW;
Shyr-Long Jeng, Hsinchu, TW;
Shin-Wei Huang, New Taipei, TW;
National Chiao Tung University, Hsinchu, TW;
Abstract
The present invention provides a current limit circuit apparatus, coupled with the gate of a GaN transistor. The current limit circuit comprises a diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor. The source and the drain of the first transistor couple with the diode. The source of the second transistor couples with the gate of the first transistor. The source of the first transistor couples with the first transistor. The source of the second transistor couples with the second resistor. The third resistor couples with the fourth resistor and the gate of the first transistor. The first transistor turned off and the gate current is limited. When the current of the gate of the GaN transistor exceeds the predetermined value, the breakdown voltage is increased by limiting the gate current.