The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

Dec. 17, 2009
Applicant:

Srinivas Sriadibhatla, Bangalore, IN;

Inventor:

Srinivas Sriadibhatla, Bangalore, IN;

Assignee:

LSI Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 3/012 (2006.01);
U.S. Cl.
CPC ...
H03K 3/012 (2013.01);
Abstract

A system and device for reducing leakage current in a sequential circuit is disclosed. In one embodiment, a system for reducing leakage current in a sequential circuit includes a combinational logic circuit, one or more reset flip-flops coupled to the combinational logic circuit, and one or more set-reset flip-flops coupled to the combinational logic circuit. The system further includes a control module coupled to the reset flip-flops and to the set flip-flops and configured to reset the reset flip-flops and to set the set-reset flip-flops when a standby mode of the sequential circuit is triggered.


Find Patent Forward Citations

Sriadibhatla, Srinivas. (2014). Leakage current reduction in a sequential circuit (U.S. Patent No. 8736332). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8736332

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…