The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8735231 B1

PDF
Full Text
Expired
Date of Patent:
May. 27, 2014

Filed:

Aug. 22, 2011
Applicants:

Hidekazu Miyairi, Kanagawa, JP;

Takafumi Mizoguchi, Kanagawa, JP;

Inventors:

Hidekazu Miyairi, Kanagawa, JP;

Takafumi Mizoguchi, Kanagawa, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/00 (2006.01); H01L 21/84 (2006.01); H01L 21/70 (2006.01); H01L 21/283 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/707 (2013.01); H01L 21/84 (2013.01); H01L 21/283 (2013.01); H01L 29/78648 (2013.01);
Abstract

A dual-gate transistor including: a first insulating layer provided to cover a first conductive layer; a first semiconductor layer over the first insulating layer; second semiconductor layers over the first semiconductor layer, the second semiconductor layers are spaced from each other to expose the first semiconductor layer; impurity semiconductor layers over the second semiconductor layers; second conductive layers over the impurity semiconductor layers; second insulating layers over the second conductive layers; a third insulating layer to cover the first semiconductor layer, the second semiconductor layers, the impurity semiconductor layers, the second conductive layers, and the second insulating layers; and a third conductive layer at least over the third insulating layer, and in the dual-gate transistor including the first to third insulating layers with openings, the first insulating layer is substantially equal in thickness to the second insulating layer.


Find Patent Forward Citations

Miyairi, Hidekazu. (2014). Manufacturing method of dual-gate thin film transistor (U.S. Patent No. 8735231). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8735231

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