The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2014

Filed:

Nov. 20, 2009
Applicants:

Masaki Umayabashi, Tokyo, JP;

Zhenlong Cui, Tokyo, JP;

Kazuo Takagi, Tokyo, JP;

Inventors:

Masaki Umayabashi, Tokyo, JP;

Zhenlong Cui, Tokyo, JP;

Kazuo Takagi, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock synchronization system synchronizes a clock of a slave node with a clock of a master node. The master node includes a packet transmitting unit that transmits a packet including a time stamp (TS) to the slave node. The slave node includes: a packet receiving unit that receives the packet transmitted from the master node; a packet filter unit that calculates as a value of delay of the packet a difference between a TS on the clock of the slave node when the packet is received and the TS of the packet received, corrects the value of the delay of the packet or a threthold for the delay of the packet, and performs filter processing on the packet received from the packet receiving unit based on the value of the delay of the packet and the threshold for the delay of the packet; and a phase synchronization unit that outputs the clock of the slave node based on the TS included in the packet employed.


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