The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8730744 B1

PDF
Full Text
Expired
Date of Patent:
May. 20, 2014

Filed:

May. 17, 2012
Applicant:

Tomohiro Kawakubo, Kokubunji, JP;

Inventor:

Tomohiro Kawakubo, Kokubunji, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/10 (2006.01); G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory has a memory cell array having a plurality of real word lines, a plurality of redundant word lines, a plurality of bit lines crossing with the real and redundant word lines, a plurality of memory cells provided at crossing section of the real and redundant word lines and the bit lines, and a row selection circuit for selecting the real word line or the redundant word line in accordance with a row address being supplied. The row selection circuit selects the real word line or the redundant word line at an ordinary operation, and multi-selects the redundant word lines at a first test mode.


Find Patent Forward Citations

Kawakubo, Tomohiro. (2014). Semiconductor memory with redundant word lines, system, and method of manufacturing semiconductor memory (U.S. Patent No. 8730744). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8730744

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