The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2014

Filed:

Oct. 07, 2011
Applicants:

John M. Danskin, Providence, RI (US);

John S. Montrym, Los Altos Hills, CA (US);

John Erik Lindholm, Saratoga, CA (US);

Steven E. Molnar, Chapel Hill, NC (US);

Mark French, Raleigh, NC (US);

Inventors:

John M. Danskin, Providence, RI (US);

John S. Montrym, Los Altos Hills, CA (US);

John Erik Lindholm, Saratoga, CA (US);

Steven E. Molnar, Chapel Hill, NC (US);

Mark French, Raleigh, NC (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06T 1/20 (2006.01); G09G 5/36 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A parallel array architecture for a graphics processor includes a multithreaded core array including a plurality of processing clusters, each processing cluster including at least one processing core operable to execute a pixel shader program that generates pixel data from coverage data; a rasterizer configured to generate coverage data for each of a plurality of pixels; and pixel distribution logic configured to deliver the coverage data from the rasterizer to one of the processing clusters in the multithreaded core array. A crossbar coupled to each of the processing clusters is configured to deliver pixel data from the processing clusters to a frame buffer having a plurality of partitions.


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