The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2014
Filed:
Sep. 25, 2009
Chirayarikathu Veedu Sankarapillai Premachandran, Singapore, SG;
Rakesh Kumar, Singapore, SG;
Nagarajan Ranganathan, Singapore, SG;
Won Kyoung Choi, Singapore, SG;
Ebin Liao, Singapore, SG;
Yasuyuki Mitsuoka, Chiba, JP;
Hiroshi Takahashi, Chiba, JP;
Ryuta Mitsusue, Chiba, JP;
Chirayarikathu Veedu Sankarapillai Premachandran, Singapore, SG;
Rakesh Kumar, Singapore, SG;
Nagarajan Ranganathan, Singapore, SG;
Won Kyoung Choi, Singapore, SG;
Ebin Liao, Singapore, SG;
Yasuyuki Mitsuoka, Chiba, JP;
Hiroshi Takahashi, Chiba, JP;
Ryuta Mitsusue, Chiba, JP;
Agency for Science, Technology and Research, Singapore, SG;
Seiko Instruments, Inc., Chiba, JP;
Abstract
In an embodiment, a wafer level package may be provided. The wafer level package may include a device wafer including a MEMS device, a cap wafer disposed over the device wafer, at least one first interconnect disposed between the device wafer and the cap wafer and configured to provide an electrical connection between the device wafer and the cap wafer, and a conformal sealing ring disposed between the device wafer and the cap wafer and configured to surround the at least one first interconnect and the MEMS device so as to provide a conformally sealed environment for the at least one first interconnect and the MEMS device, wherein the conformal sealing ring may be configured to conform to a respective suitable surface of the device wafer and the cap wafer when the device wafer may be bonded to the cap wafer. A method of forming a wafer level package may also be provided.