The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2014
Filed:
Sep. 05, 2012
Lingkuan Meng, Beijing, CN;
Lingkuan Meng, Beijing, CN;
Abstract
A method of manufacturing a semiconductor device is disclosed. The method may comprise: forming a gate stack on a substrate; depositing a first dielectric layer and a second dielectric layer sequentially on the substrate and the gate stack; and etching the second dielectric layer and the first dielectric layer sequentially with an etching gas containing helium to form a second spacer and a first spacer, respectively. According to the method disclosed herein, a dual-layer complex spacer configuration is achieved, and two etching operations where the etching gas comprises the helium gas are performed. As a result, it is possible to reduce damages to the substrate and also to reduce the process complexity. Further, it is possible to optimize a threshold voltage, effectively reduce an EOT, and enhance a gate control capability and a driving current.