Clock control device, clock control method, clock control program and integrated circuit

Abstract

An instruction detecting section () detects whether or not there is any succeeding instruction executable regardless of an order based on a data dependency relationship between a presently executed instruction and a succeeding instruction following the presently executed instruction. A clock switch judging section () receives notification of the start and end of a memory stall, determines whether or not a memory stall is occurring, and judges whether to switch a clock signal to be supplied to a CPU () to a low clock signal () or to stop the clock signal based on a detection result of the instruction detecting section () if it is judged that the memory stall is occurring. A clock switching section () switches the clock signal based on judgment by the clock switch judging section (). By this construction, power consumption can be reduced without reducing performance.