The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2014
Filed:
Apr. 24, 2012
Bon-seok Koo, Daejeon, KR;
Jeong-seok Lim, Daejeon, KR;
Jae-woo Han, Daejeon, KR;
Kwang-mo Yang, Daejeon, KR;
Soo-hyeon Kim, Daejeon, KR;
Hyo-won Kim, Daejeon, KR;
Jung-hyung Park, Daejeon, KR;
Choon-soo Kim, Daejeon, KR;
E-joong Yoon, Daejeon, KR;
Bon-Seok Koo, Daejeon, KR;
Jeong-Seok Lim, Daejeon, KR;
Jae-Woo Han, Daejeon, KR;
Kwang-Mo Yang, Daejeon, KR;
Soo-Hyeon Kim, Daejeon, KR;
Hyo-Won Kim, Daejeon, KR;
Jung-Hyung Park, Daejeon, KR;
Choon-Soo Kim, Daejeon, KR;
E-Joong Yoon, Daejeon, KR;
Electronics and Telecommunications Research Institute, Daejeon, KR;
Abstract
An FPGA apparatus and a method for protecting bitstreams are provided. The FPGA apparatus includes: a key storage unit, which is configured to be accessed only from within the FPGA, and having stored therein the encryption/decryption key and the initial key generated by the random number generator; a setting bitstream storage unit, which is an internal non-volatile memory stored with bitstreams for setting authentication and encryption/decryption; and an authentication and encryption/decryption setting unit, which is configured to call the encryption and decryption key and the initial value stored in the key storage unit to store encrypted bitstreams and authentication codes generated as a result of performing encryption on the bitstreams stored in the setting bitstream storage unit in external non-volatile memory, and verity the integrity of the encrypted bitstreams stored in the external non-volatile memory at the time of designing of the FPGA using the encrypted bitstreams.