The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2014
Filed:
Jan. 25, 2011
Tae-wook OH, Seoul, KR;
Soo-jung Ryu, Hwaseong-si, KR;
Yoon-jin Kim, Seoul, KR;
Woong Seo, Hwaseong-si, KR;
Young-chul Cho, Yongin-si, KR;
Il-hyun Park, Yongin-si, KR;
Tae-Wook Oh, Seoul, KR;
Soo-Jung Ryu, Hwaseong-si, KR;
Yoon-Jin Kim, Seoul, KR;
Woong Seo, Hwaseong-si, KR;
Young-Chul Cho, Yongin-si, KR;
Il-Hyun Park, Yongin-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
A processor simulation technique to evaluate the performance of a processor that executes application programs is provided. The processor simulation technique may be used to optimize the execution of an application program. A simulator of a reconfigurable processor including a plurality of functional units models a processor by representing routing paths between functional units that generate operands and functional units that consume the operands. The size of each queue may be decided based on information regarding routing delays between functional units and stage information of iteration loops according to modulo scheduling received from a scheduler. A modeling code DB that stores host-oriented binary codes for operations of routing queues is also provided. The simulation may be performed by executing a host-directed binary code corresponding to a binary file instead of the binary file.