The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2014
Filed:
Sep. 11, 2012
Ming-feng Hsu, New Taipei, TW;
Kai-yin Liu, Kaohsiung, TW;
Tzu-han Hsu, Kaohsiung, TW;
Yuan-jih Chu, Hsinchu, TW;
Ming-Feng Hsu, New Taipei, TW;
Kai-Yin Liu, Kaohsiung, TW;
Tzu-Han Hsu, Kaohsiung, TW;
Yuan-Jih Chu, Hsinchu, TW;
Realtek Semiconductor Corp., Science Park, HsinChu, TW;
Abstract
A transceiver includes a transceiver and a clock generation unit. The clock generation unit includes a clock generator, a multiplexer, and a frequency difference detector. The transceiver exchanges data with a link partner according to a first clock generated by a phase-locked loop. The clock generator is used for generating and outputting a second clock. The multiplexer is used for receiving a calibration clock or a receiver clock of the link partner, and outputting the calibration clock or the receiver clock of the link partner. The frequency difference detector is used for generating a difference signal according to a difference between the calibration clock and the second clock, or a difference between the receiver clock of the link partner and the second clock. The clock generator adjusts the shift of the second clock according to the difference signal. The phase-locked loop generates the first clock according to the second clock.