The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2014

Filed:

Jun. 20, 2012
Applicants:

Hsien Cheng Chang, Changhua County, TW;

Yan Jou Chen, Tainan County, TW;

Inventors:

Hsien Cheng Chang, Changhua County, TW;

Yan Jou Chen, Tainan County, TW;

Assignee:

Hannstar Display Corp., Taipei County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A gate driving circuit receives a plurality of clock signals in a sequence and includes a plurality of cascaded drive units sequentially outputting an output signal, wherein a first-stage drive unit of the gate driving circuit receives a scan start signal or a scan end signal while a last-stage drive unit thereof receives a scan end signal or a scan start signal; wherein a driving direction of the gate driving circuit is reversed by reversing the sequence of the clock signals and exchanging the scan start signal and the scan end signal. The present invention further provides a driving method of a gate driving circuit.


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Chang, Hsien. (2014). Gate driving circuit receiving a plurality of clock signals and having forward and reverse driving modes and driving method thereof (U.S. Patent No. 8723776). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8723776

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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