The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2014
Filed:
Mar. 21, 2011
Hiroshi Akahori, Yokohama, JP;
Kiyohito Nishihara, Yokohama, JP;
Masaki Kondo, Kawasaki, JP;
Yingkang Zhang, Yokohama, JP;
Shigeo Kondo, Saitama, JP;
Hidenobu Nagashima, Yokohama, JP;
Kazuaki Iwasawa, Yokohama, JP;
Takashi Ichikawa, Saitama, JP;
Hiroshi Akahori, Yokohama, JP;
Kiyohito Nishihara, Yokohama, JP;
Masaki Kondo, Kawasaki, JP;
Yingkang Zhang, Yokohama, JP;
Shigeo Kondo, Saitama, JP;
Hidenobu Nagashima, Yokohama, JP;
Kazuaki Iwasawa, Yokohama, JP;
Takashi Ichikawa, Saitama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.