The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2014

Filed:

Sep. 13, 2012
Applicants:

Atsushi Onodera, Tokyo, JP;

Koei Suzuki, Kanagawa, JP;

Hiroshi Miura, Kanagawa, JP;

Takanori Tano, Chiba, JP;

Inventors:

Atsushi Onodera, Tokyo, JP;

Koei Suzuki, Kanagawa, JP;

Hiroshi Miura, Kanagawa, JP;

Takanori Tano, Chiba, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01);
U.S. Cl.
CPC ...
Abstract

A multiple-layer wiring substrate having a first conductive layer; an interlayer insulating layer; and a second conductive layer is disclosed, wherein the interlayer insulating layer includes a material whose surface energy is changed by receiving energy, and has a first region which does not include a contact hole and a second region which is formed such that its surface energy is higher than that of the first region, wherein a region within the contact hole of the first conductive layer has surface energy which is higher than surface energy of the second region of the interlayer insulating layer, and wherein the second conductive layer is formed by laminating, wherein the second conductive layer is in contact with the second region of the interlayer insulating layer along the second region, and is connected to the first conductive layer via the contact hole.


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