The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2014
Filed:
Jan. 22, 2013
Lsi Corporation, San Jose, CA (US);
Lun Ye, Allentown, PA (US);
Edward C. Morgan, Macungie, PA (US);
LSI Corporation, San Jose, CA (US);
Abstract
Techniques in integrated circuit design systems for generating one or more models for use in a hierarchical crosstalk noise analysis. For example, a method comprises the following steps. At least one equivalent cell noise model is generated for a circuit under modeling. The circuit under modeling comprises a plurality of cells useable in an integrated circuit design. The equivalent cell noise model is generated based on each one of the plurality of cells that have connections that terminate at ports of the circuit under modeling. The equivalent cell noise model is utilized in a hierarchical crosstalk noise analysis for the integrated circuit design.
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