The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2014
Filed:
Apr. 30, 2012
Chen He, Austin, TX (US);
Kelly K. Taylor, Austin, TX (US);
Chen He, Austin, TX (US);
Kelly K. Taylor, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A new, robust non-volatile memory (NVM) reset sequence is provided in accordance with at least one embodiment, which, after reading a Test NVM portion and overwriting NVM configuration registers' default values with the values read from the Test NVM portion, does a read integrity check. If the read integrity check passes, a reset process will conclude. Otherwise, if the read integrity check fails, the reset process will re-try reading the Test NVM and overwriting the NVM configuration registers' default values. If the read integrity check still fails after a maximum number of re-tries, a fail flag will be set, and the predetermined 'safe' default values will be reloaded to the NVM configuration registers, thereby assuring that the NVM device is operational.