The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2014
Filed:
Apr. 13, 2011
Erik Richter Altman, Danbury, CT (US);
Ravi Nair, Briarcliff Manor, NY (US);
John Kevin O'brien, South Salem, NY (US);
Kathryn Mary O'brien, South Salem, NY (US);
Peter Howland Oden, Ossining, NY (US);
Daniel Arthur Prener, Croton-on-Hudson, NY (US);
Sumeda Wasudeo Sathaye, Lagrangeville, NY (US);
Erik Richter Altman, Danbury, CT (US);
Ravi Nair, Briarcliff Manor, NY (US);
John Kevin O'Brien, South Salem, NY (US);
Kathryn Mary O'Brien, South Salem, NY (US);
Peter Howland Oden, Ossining, NY (US);
Daniel Arthur Prener, Croton-on-Hudson, NY (US);
Sumeda Wasudeo Sathaye, Lagrangeville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a 'miss' in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.