The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2014
Filed:
Dec. 21, 2011
Budong You, Fremont, CA (US);
Budong You, Fremont, CA (US);
Silergy Technology, Sunnyvale, CA (US);
Silergy Semiconductor Technology (Hangzhou) Ltd., Hangzhou, CN;
Abstract
Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one embodiment, a method of fabricating an LDMOS transistor with source, drain, and gate regions on a substrate, can include: forming p-type and n-type buried layer (PBL, NBL) regions; growing an epitaxial (N-EPI) layer on the NBL/PBL regions; forming a p-doped deep p-well (DPW) region on the PBL region; forming a well region in the N-EPI layer; forming a doped body region; forming an active area and a field oxide (FOX) region, and forming a drain oxide between the source and drain regions of the LDMOS transistor; forming a gate oxide adjacent to the source and drain regions, and forming a gate on the gate oxide and a portion of the drain oxide; and forming a doped drain region, and first and second doped source regions.