The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2014

Filed:

Feb. 22, 2010
Applicants:

Michael Johas Teener, Santa Cruz, CA (US);

Bruce Currivan, Dove Canyon, CA (US);

Wael William Diab, San Francisco, CA (US);

Jeyhan Karaoguz, Irvine, CA (US);

Yongbum Kim, San Jose, CA (US);

Kenneth MA, Cupertino, CA (US);

Inventors:

Michael Johas Teener, Santa Cruz, CA (US);

Bruce Currivan, Dove Canyon, CA (US);

Wael William Diab, San Francisco, CA (US);

Jeyhan Karaoguz, Irvine, CA (US);

Yongbum Kim, San Jose, CA (US);

Kenneth Ma, Cupertino, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/167 (2006.01); G06F 15/173 (2006.01); H04L 12/28 (2006.01); G06F 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In various embodiments of a method and system for utilizing native Ethernet as a virtual memory interconnect, a first networking device may be operable to transcode a memory read command and/or a memory write command to memory access information and encapsulate the memory access information within in one or more fields of an Ethernet frame. The memory access information may be communicated over an Ethernet link to a second networking device where it may be utilized to access memory that is associated with the memory read command and/or the memory write command. For example, the memory access information may indicate an address of the memory to be accessed, whether a read operation and/or a write operation is to be performed, whether the frame comprises data to be written to the memory, and/or whether a locally administered address space is utilized.


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