The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 22, 2014
Filed:
Dec. 24, 2008
Yannick Guedon, Singapore, SG;
Meiliana Leow, Singapore, SG;
Sze-kwang Tan, Singapore, SG;
Mariano Dissegna, Freising, DE;
Lorenzo Cerati, Cinisello Balsamo, IT;
Yannick Guedon, Singapore, SG;
Meiliana Leow, Singapore, SG;
Sze-Kwang Tan, Singapore, SG;
Mariano Dissegna, Freising, DE;
Lorenzo Cerati, Cinisello Balsamo, IT;
STMicroelectronics Asia Pacific Pte Ltd, Singapore, SG;
Abstract
An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode.