The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2014

Filed:

Oct. 27, 2010
Applicants:

Antonino Conte, Trimestieri Etneo, IT;

Mario Micciche, Agrigento, IT;

Rosario Roberto Grasso, Acicastello, IT;

Maria Giaquinta, Catania, IT;

Inventors:

Antonino Conte, Trimestieri Etneo, IT;

Mario Micciche, Agrigento, IT;

Rosario Roberto Grasso, Acicastello, IT;

Maria Giaquinta, Catania, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/567 (2006.01); G05F 1/575 (2006.01); H03L 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A bandgap voltage reference circuit for generating a bandgap voltage reference. An embodiment comprises a current generator controlled by a first driving voltage for generating a first current depending on the driving voltage, and a first reference circuit element coupled to the controlled current generator for receiving the first current and generating a first reference voltage in response to the first current. The circuit further comprises a second reference circuit element for receiving a second current corresponding to the first current; said second reference circuit element is adapted to generate a second reference voltage in response to the second current. The circuit further comprises an operational amplifier having a first input coupled to the first circuit element and a second input coupled to the second reference circuit element. The circuit also comprises a control circuit comprising first capacitive element and second capacitive element.


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