The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 22, 2014
Filed:
Sep. 27, 2011
Arash Hazeghi, San Francisco, CA (US);
Joseph A. Sulpizio, Humble, TX (US);
David J. K. Goldhaber, Palo Alto, CA (US);
H. S. Philip Wong, Stanford, CA (US);
Arash Hazeghi, San Francisco, CA (US);
Joseph A. Sulpizio, Humble, TX (US);
David J. K. Goldhaber, Palo Alto, CA (US);
H. S. Philip Wong, Stanford, CA (US);
The Board of Trustees of the Leland Stanford Junior University, Palo Alto, CA (US);
Abstract
The present approach is based on the use of an integrated capacitance bridge circuit to measure the capacitance of a device under test. A significant feature of this approach is that the operating point is not the null point of the bridge circuit. Instead, the operating point of the bridge circuit is tuned to be away from the null point. By moving away from the null point, the output signal from the bridge circuit is increased. Preferably, this output signal is substantially larger than the input noise floor of an amplifier connected to the bridge circuit output, while being substantially less than Gν, where G is the gain provided by the bridge circuit transistor and νis the AC signal applied to the device under test. Experiments on graphene devices and on carbon nanotube FETs demonstrate about 10 aF resolution (graphene) and about 13 aF resolution (carbon nanotube FET) at room temperature.