The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2014

Filed:

Mar. 23, 2012
Applicants:

Katsuya Tanaka, Yokohama, JP;

Masanori Takada, Yokohama, JP;

Shintaro Kudo, Yokohama, JP;

Inventors:

Katsuya Tanaka, Yokohama, JP;

Masanori Takada, Yokohama, JP;

Shintaro Kudo, Yokohama, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/08 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0808 (2013.01); G06F 3/0646 (2013.01);
Abstract

According to a prior art storage subsystem, shared memories are mirrored in main memories of two processors providing redundancy. When the consistency of writing order of data is not ensured among mirrored shared memories, the processors must read only one of the mirrored shared memories to have the write order of the read data correspond among the two processors. As a result, upon reading data from the shared memories, it is necessary for a processor to read data from the main memory of the other processor, so that the overhead is increased compared to the case where the respective processors read their respective main memories. According to the storage subsystem of the present invention, a packet redirector having applied a non-transparent bridge enables to adopt a PCI Express multicast to the writing of data from the processor to the main memory, so that the order of writing data into the shared memories can be made consistent among the mirrored memories. As a result, data can be read from the shared memories speedily by accessing respective main memories in the respective processors.


Find Patent Forward Citations

Loading…