The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2014
Filed:
Aug. 28, 2012
Yoshiyuki Hata, Nagoya, JP;
Yutaka Nonomura, Nagoya, JP;
Teruhisa Akashi, Nagoya, JP;
Hirofumi Funabashi, Nagoya, JP;
Motohiro Fujiyoshi, Seto, JP;
Yoshiteru Omura, Seto, JP;
Yoshiyuki Hata, Nagoya, JP;
Yutaka Nonomura, Nagoya, JP;
Teruhisa Akashi, Nagoya, JP;
Hirofumi Funabashi, Nagoya, JP;
Motohiro Fujiyoshi, Seto, JP;
Yoshiteru Omura, Seto, JP;
Kabushiki Kaisha Toyota Chuo Kenkyusho, Nagakute-Shi, JP;
Abstract
When forming a trench of a narrow width in a thick semiconductor layer, a trench can be formed without the occurrence of semiconductor residue. In this Specification, a semiconductor device in which a trench is formed in a semiconductor layer is disclosed. In the semiconductor layer of the semiconductor device, a compensation pattern which compensates for sudden changes in the width of the trench is formed at a place at which the width of the trench changes suddenly. In the semiconductor layer of the above-described semiconductor device, since a compensation pattern is formed at a place at which the trench width changes suddenly, in the case where forming the trench using a deep RIE method, the occurrence of steep inclined portions arising from semiconductor residue can be prevented. Consequently, when forming a trench of a narrow width in a thick semiconductor layer, the occurrence of semiconductor residue can be prevented.