The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2014
Filed:
Jul. 06, 2011
Rodina Samy, Cairo, EG;
Hossam Ali Hassan Fahmy, Cairo, EG;
Tarek Eldeeb, Cairo, EG;
Ramy Raafat, Cairo, EG;
Yasmeen Farouk, Cairo, EG;
Mostafa Elkhouly, Cairo, EG;
Amira Mohamed, Cairo, EG;
Rodina Samy, Cairo, EG;
Hossam Ali Hassan Fahmy, Cairo, EG;
Tarek Eldeeb, Cairo, EG;
Ramy Raafat, Cairo, EG;
Yasmeen Farouk, Cairo, EG;
Mostafa Elkhouly, Cairo, EG;
Amira Mohamed, Cairo, EG;
SilMinds, LLC, Egypt, Cairo, EG;
Abstract
A decimal floating-point Fused-Multiply-Add (FMA) unit that performs the operation of ±(A×B)±C on decimal floating-point operands. The decimal floating-point FMA unit executes the multiplication and addition operations compliant with the IEEE 754-2008 standard. Specifically, the decimal floating-point FMA includes a parallel multiplier and injects the addend after required alignment as an additional partial product in the reduction tree used in the parallel multiplier. The decimal floating-point FMA unit may be configured to perform addition-subtraction operations or multiplication operations as standalone operations.