The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2014

Filed:

Dec. 19, 2011
Applicants:

Michael R. Foxcroft, Toronto, CA;

Shirley Pui Shan Lam, Richmond Hill, CA;

George A. W. Guthrie, Mississauga, CA;

Alexander Shternshain, Richmond Hill, CA;

Jeffrey Herman, Sunnyvale, CA (US);

Mihir S. Doctor, Sunnyvale, CA (US);

Krishna Sitaraman, Sunnyvale, CA (US);

Inventors:

Michael R. Foxcroft, Toronto, CA;

Shirley Pui Shan Lam, Richmond Hill, CA;

George A. W. Guthrie, Mississauga, CA;

Alexander Shternshain, Richmond Hill, CA;

Jeffrey Herman, Sunnyvale, CA (US);

Mihir S. Doctor, Sunnyvale, CA (US);

Krishna Sitaraman, Sunnyvale, CA (US);

Assignees:

ATI Technologies ULC, Markham, Ontario, CA;

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and a phase-locked loop (PLL) for generating output clock signals with desired frequencies are described. The PLL is equipped with a ramp generator that increments or decrements a feedback divider value before providing it to a modulator. The modulator modulates the feedback divider value and provides the modulated value to a feedback divider of the PLL for performing frequency division.


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