The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2014
Filed:
Jul. 06, 2010
Vishwas M. Rao, Breinigsville, PA (US);
James C. Parker, Zionsville, PA (US);
Vishwas M. Rao, Breinigsville, PA (US);
James C. Parker, Zionsville, PA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A method of designing an integrated circuit, an EDA tool, an apparatus and a computer-readable medium are disclosed herein. In one embodiment, the method includes: (1) generating a set of constraint equations representing clock-insertion delay values for the integrated circuit as variables, (2) determining bounds on each of the clock-insertion delay values based on the constraint equations and (3) generating a set of closing commands based on the bounds for driving a design of the integrated circuit to closure, wherein each step of the method is carried out by at least one EDA tool.