The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2014

Filed:

Nov. 11, 2010
Applicants:

Bohuslav Rychlik, San Diego, CA (US);

Ali Iranli, San Diego, CA (US);

Brian J. Salsbery, Boulder, CO (US);

Sumit Sur, Boulder, CO (US);

Steven S. Thomson, San Diego, CA (US);

Robert A. Glenn, Boulder, CO (US);

Inventors:

Bohuslav Rychlik, San Diego, CA (US);

Ali Iranli, San Diego, CA (US);

Brian J. Salsbery, Boulder, CO (US);

Sumit Sur, Boulder, CO (US);

Steven S. Thomson, San Diego, CA (US);

Robert A. Glenn, Boulder, CO (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G06F 1/12 (2006.01); G06F 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of controlling core clocks in a multicore central processing unit is disclosed and may include executing a zeroth dynamic clock and voltage scaling (DCVS) algorithm on a zeroth core and executing a first DCVS algorithm on a first core. The zeroth DCVS algorithm may operable to independently control a zeroth clock frequency associated with the zeroth core and the first DCVS algorithm may be operable to independently control a first clock frequency associated with the first core.


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