The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2014

Filed:

Aug. 24, 2009
Applicants:

Jason M. Hart, Hayden, ID (US);

Robert P. Masleid, Sereno, CA (US);

Inventors:

Jason M. Hart, Hayden, ID (US);

Robert P. Masleid, Sereno, CA (US);

Assignee:

Oracle America, Inc., Redwood Shores, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 29/02 (2006.01); H03K 9/08 (2006.01); H03K 5/01 (2006.01); H03K 3/017 (2006.01); H03K 5/04 (2006.01); H03K 7/08 (2006.01); H03K 3/00 (2006.01); H03K 3/289 (2006.01);
U.S. Cl.
CPC ...
Abstract

The described embodiments provide a configurable clock circuit. The clock circuit includes a control and enable circuit and a clock distribution circuit. During operation, when a signal on an enable input to the control and enable circuit is asserted and the control and enable circuit is configured in a clock mode, the control and enable circuit generates an enable signal on a control output to enable a signal on a clock input to propagate through the clock distribution circuit to the clock output. Alternatively, when a signal on the enable input to the control and enable circuit is asserted and the control and enable circuit is configured in a pulse mode, the control and enable circuit generates a pulsed control signal on the control output to control a length of a pulse generated from the clock input on a clock output by the clock distribution circuit.


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