The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2014

Filed:

Apr. 26, 2012
Applicants:

Léon C. M. Van Den Oever, Rosmalen, NL;

Erwin Spits, Utrecht, NL;

Inventors:

Léon C. M. van den Oever, Rosmalen, NL;

Erwin Spits, Utrecht, NL;

Assignee:

EPCOS AG, Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
H03K 19/09421 (2013.01);
Abstract

A circuit includes a logic stage, an inverter stage, and a driver stage. The logic stage and the inverter stage are provided with current limiters, which include a D-mode feedback transistor and a component that generates a voltage drop. A feedback loop connects the source and the gate of the D-mode feedback transistor via this component. The driver stage includes E-mode transistors connected in a totem pole that drive a D-mode transistor and an E-mode transistor to connect and disconnect the load circuit.


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