The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2014
Filed:
Jun. 24, 2011
Michael Bergmann, Chapel Hill, NC (US);
Matthew Donofrio, Raleigh, NC (US);
Sten Heikman, Goleta, CA (US);
Kevin S. Schneider, Cary, NC (US);
Kevin W. Haberern, Cary, NC (US);
John A. Edmond, Durham, NC (US);
Michael Bergmann, Chapel Hill, NC (US);
Matthew Donofrio, Raleigh, NC (US);
Sten Heikman, Goleta, CA (US);
Kevin S. Schneider, Cary, NC (US);
Kevin W. Haberern, Cary, NC (US);
John A. Edmond, Durham, NC (US);
Cree, Inc., Durham, NC (US);
Abstract
Embodiments of the present invention are generally related to LED chips having improved overall emission by reducing the light-absorbing effects of barrier layers adjacent mirror contacts. In one embodiment, a LED chip comprises one or more LEDs, with each LED having an active region, a first contact under the active region having a highly reflective mirror, and a barrier layer adjacent the mirror. The barrier layer is smaller than the mirror such that it does not extend beyond the periphery of the mirror. In another possible embodiment, an insulator is further provided, with the insulator adjacent the barrier layer and adjacent portions of the mirror not contacted by the active region or by the barrier layer. In yet another embodiment, a second contact is provided on the active region. In a further embodiment, the barrier layer is smaller than the mirror such that the periphery of the mirror is at least 40% free of the barrier layer, and the second contact is below the first contact and accessible from the bottom of the chip.