The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2014

Filed:

Apr. 21, 2011
Applicants:

G. Glenn Henry, Austin, TX (US);

Terry Parks, Austin, TX (US);

Brent Bean, Austin, TX (US);

Thomas A. Crispin, Austin, TX (US);

Inventors:

G. Glenn Henry, Austin, TX (US);

Terry Parks, Austin, TX (US);

Brent Bean, Austin, TX (US);

Thomas A. Crispin, Austin, TX (US);

Assignee:

VIA Technologies, Inc., New Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01);
U.S. Cl.
CPC ...
Abstract

A microprocessor includes an architected register having a bit (may be x86 EFLAGS register reserved bit) set by the microprocessor. A fetch unit fetches encrypted instructions from an instruction cache and decrypts them (via XOR) prior to executing them, in response to the microprocessor setting the bit. The microprocessor saves the bit value to a stack in memory and then clears the bit in response to receiving an interrupt. The fetch unit fetches unencrypted instructions from the instruction cache and executes them without decrypting them after the microprocessor clears the bit. The microprocessor restores the saved value from the stack in memory to the bit in the architected register (and in one embodiment, also restores decryption key values) in response to executing a return from interrupt instruction. The fetch unit resumes fetching and decrypting the encrypted instructions in response to determining that the restored value of the bit is set.


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