The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2014
Filed:
Jan. 20, 2009
Upgrade of low priority prefetch requests to high priority real requests in shared memory controller
Sajish Sajayan, C.V. Raman Nagar, IN;
Alok Anand, Bangalore, IN;
Ashish Rai Shrivastava, Sugar Land, TX (US);
Joseph R. Zbiciak, Arlington, TX (US);
Sajish Sajayan, C.V. Raman Nagar, IN;
Alok Anand, Bangalore, IN;
Ashish Rai Shrivastava, Sugar Land, TX (US);
Joseph R. Zbiciak, Arlington, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A prefetch controller implements an upgrade when a real read access request hits the same memory bank and memory address as a previous prefetch request. In response per-memory bank logic promotes the priority of the prefetch request to that of a read request. If the prefetch request is still waiting to win arbitration, this upgrade in priority increases the likelihood of gaining access generally reducing the latency. If the prefetch request had already gained access through arbitration, the upgrade has no effect. This thus generally reduces the latency in completion of a high priority real request when a low priority speculative prefetch was made to the same address.