The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2014

Filed:

Aug. 06, 2012
Applicants:

Aatmesh Shrivastava, Richardson, TX (US);

Rajesh Yadav, Bangalore, IN (US);

Inventors:

Aatmesh Shrivastava, Richardson, TX (US);

Rajesh Yadav, Bangalore, IN (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Integrated Circuits (ICs) comprising circuits configured to generate a power on reset (POR) pulse are disclosed. An IC comprises a power supply sense circuit configured to generate a sense signal in response to a transition of a power supply signal from a first level to a second level, and a pulse generation circuit coupled with the power supply sense circuit. The pulse generation circuit is configured to generate a power on reset (POR) pulse of a threshold duration based on the sense signal. The IC further includes a reset generation circuit coupled with the pulse generation circuit to receive the POR pulse. The reset generation circuit is configured to generate a reset pulse based on the POR signal and of at least one control signal, where the reset pulse is configured to be utilized to perform a reset of one or more elements of the integrated circuit.


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