The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2014

Filed:

Oct. 03, 2012
Applicant:

Fujitsu Semiconductor Limited, Yokohama, JP;

Inventors:

Akihisa Yamaguchi, Yokohama, JP;

Eiji Yoshida, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Memory cells adjacent to each other in a second direction are formed in a first p-type well region, a first n-type well region, and a second p-type well region arranged in a first direction. Each memory cell includes a first transfer transistor and a first driver transistor formed in the first p-type well region, a second transfer transistor and a second driver transistor formed in the second p-type well region, and first and second load transistors formed in the first n-type well region. In an SRAM, gate electrodes of the first and second transfer transistors of the memory cells adjacent to each other in the second direction are electrically connected to first and second word lines, respectively. The first and second word lines are electrically connected to the first and second p-type well regions, respectively.


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