The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2014

Filed:

Aug. 27, 2010
Applicants:

Riccardo Serventi, Viareggio, IT;

Luigi Di Piro, Ponsacco, IT;

Monica Schipani, Pisa, IT;

Paolo D'abramo, Civitavecchia, IT;

Inventors:

Riccardo Serventi, Viareggio, IT;

Luigi Di Piro, Ponsacco, IT;

Monica Schipani, Pisa, IT;

Paolo D'Abramo, Civitavecchia, IT;

Assignee:

AMS AG, Unterpremstaetten, AT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
Abstract

A coupling circuit has a first and a second transistor (P, P) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P) is connected to a signal input (), source terminals of the first and the second transistor (P, P) are commonly connected to a signal output (), bulk terminals of the first and the second transistor (P, P) are commonly connected to a drain terminal of the second transistor (P), and a gate terminal of the first transistor (P) is connected to a gate terminal of the second transistor (P). The coupling circuit further comprises a gate control circuit () with a charge pump circuit () which is configured to generate a negative potential. The gate control circuit () is configured to control a gate voltage at the gate terminals of the first and the second transistor (P, P) based on a negative potential.


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