The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2014
Filed:
Dec. 02, 2011
Andrew T S Pomerene, Leesburg, VA (US);
Wesley D. Reinhardt, Washington, DC (US);
Craig M. Hill, Warrenton, VA (US);
Andrew T S Pomerene, Leesburg, VA (US);
Wesley D. Reinhardt, Washington, DC (US);
Craig M. Hill, Warrenton, VA (US);
BAE Systems Information and Electronic Systems Integration Inc., Nashua, NH (US);
Abstract
An asymmetric slotted waveguide and method for fabricating the same. The slotted waveguide is constructed in silicon-on-insulator using a Complementary metal-oxide-semiconductor (CMOS) process. One or more wafers can be coated with a photo resist material using a photolithographic process in order to thereby bake the wafers via a post apply bake (PAB) process. An anti-reflective coating (TARC) can be further applied on the wafers and the wafers can be exposed on a scanner for the illumination conditions. After a post exposure bake (PEB), the wafers can be developed in a developer using a puddle develop process. Finally, the printed wafers can be processed using a shrink process to reduce the critical dimension (CD) of the slot and thereby achieve an enhanced asymmetric slotted waveguide that is capable of guiding the optical radiation in a wide range of optical modulation applications using an electro-optic polymer cladding.