Systems and methods for high speed data recovery with free running sampling clock

Abstract

Systems and methods are disclosed for improving digital feed-forward data recovery of high speed data from a received data stream in a data transceiver or receiver where the receiver clock is asynchronous to the transmitter clock used to transmit the received data stream. In one example, the received data stream is oversampled using N evenly-spaced multi-phase clocks. The oversampled data are packed into a data block. Data transition edges of the oversampled data in the data blocks with respect to multi-phase clocks are tracked. The tracked data transition edges are used to determine the length of a decision window and to further divide the oversampled data into groups of bits that are hypothesized to be samples of the same received data symbol. Bit mapping is performed on the decision window to recover the received data symbol. By tracking the movement of data transition edges, the technique enhances data recovery capability.