The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2014

Filed:

Feb. 11, 2011
Applicants:

Myung Sub Lee, Seoul, KR;

Ji Young Jeong, Cheonan-si, KR;

Sun-kyu Joo, Suwon-si, KR;

Myung Jin Lee, Asan-si, KR;

Inventors:

Myung Sub Lee, Seoul, KR;

Ji Young Jeong, Cheonan-si, KR;

Sun-Kyu Joo, Suwon-si, KR;

Myung Jin Lee, Asan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1339 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13394 (2013.01); G02F 1/13392 (2013.01);
Abstract

Provided are a thin film transistor display panel, a liquid crystal display, and a manufacturing method therefor, that can prevent errors or omissions in rubbing due to a step between a pixel electrode and a data line, and the resulting light leakage, as well as increase the effective area ratio of a spacer and prevent shorts from occurring during at least some repair processes. The thin film transistor array panel includes: a first substrate; a gate line and a data line formed on the first substrate; a step preventing member formed on the data line to at least partially fill a volume positioned between the data line and a pixel electrode; and a spacer formed on the first substrate, wherein the spacer and the step preventing member comprise the same material.


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