The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2014
Filed:
Jul. 24, 2008
Sachio Tsujino, Osaka, JP;
Shuji Nishi, Osaka, JP;
Yuhichiroh Murakami, Osaka, JP;
Yasushi Sasaki, Osaka, JP;
Seijirou Gyouten, Osaka, JP;
Sachio Tsujino, Osaka, JP;
Shuji Nishi, Osaka, JP;
Yuhichiroh Murakami, Osaka, JP;
Yasushi Sasaki, Osaka, JP;
Seijirou Gyouten, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
An object of the present invention is to provide a power supply circuit including a charge-pumping booster section which uses switching elements provided only by N-channel transistors yet does not have a problem of voltage drop by threshold value. In a booster section (), capacitors (C) and (C) have their respective first terminals connected with transistors (Q, Q) and (Q, Q) respectively. Each transistor has its gate terminal supplied with control signals generated in a driver section (). The driver section () includes capacitors (C, C) connected with input terminals (Ti, Ti) for respective supply of clock signals DCK, DCKB each having a voltage alternating between −VDD and VDD (VDD represents an input supply voltage from outside), as level-shifted signals of clock signals DCK, DCKB which are supplied to second terminals of the capacitors (C, C) respectively. In this arrangement, the driver sectiongenerates signals each having a voltage alternating between VDD and 3VDD, as the control signals.