The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 2014
Filed:
Sep. 05, 2008
Applicants:
Zahir Parpia, Toronto, CA;
David Lewis, Toronto, CA;
Inventors:
Zahir Parpia, Toronto, CA;
David Lewis, Toronto, CA;
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for performing static timing analysis includes generating current source driver models for components in a system operating at a supply voltage during a simulation of a path. A delay value for the path is derived from the simulation using the current source driver models for components along the path.
Parpia, Zahir. (2014). Method and apparatus for performing timing analysis with current source driver models using interpolated device characteristics (U.S. Patent No. 8661386). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8661386
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile