The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 2014
Filed:
Oct. 21, 2010
Ji-hwan Park, Seoul, KR;
Hyun-moo Kim, Seongnam-si, KR;
Nam-su Ha, Anyang-si, KR;
Jung-hwan Choi, Seongnam-si, KR;
Jin-hyo Kim, Hwaseong-si, KR;
Tae-il Kim, Seoul, KR;
Il-hyun Cho, Seoul, KR;
Sung-joon Jang, Wonju-si, KR;
Hye-sun Kim, Suwon-si, KR;
Jin-kyoung Du, Seoul, KR;
Ji-Hwan Park, Seoul, KR;
Hyun-Moo Kim, Seongnam-si, KR;
Nam-Su Ha, Anyang-si, KR;
Jung-Hwan Choi, Seongnam-si, KR;
Jin-Hyo Kim, Hwaseong-si, KR;
Tae-Il Kim, Seoul, KR;
Il-Hyun Cho, Seoul, KR;
Sung-Joon Jang, Wonju-si, KR;
Hye-Sun Kim, Suwon-si, KR;
Jin-Kyoung Du, Seoul, KR;
Samsung Electronics Co., Ltd, , KR;
Abstract
A power control method of a Central Processing Unit (CPU) in a multi-core system. The power control method includes acquiring current usage information of the CPU and system information, estimating a CPU usage of a next time interval based on the acquired current usage information, calibrating the estimated CPU usage of the next time interval based on the acquired system information, and determining a power control mode based on at least one of the acquired system information and the calibrated CPU usage of the next time interval.