The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2014

Filed:

Apr. 16, 2012
Applicants:

Christopher M. Abernathy, Austin, TX (US);

Mary D. Brown, Austin, TX (US);

Hung Q. Le, Austin, TX (US);

Dung Q. Nguyen, Austin, TX (US);

Inventors:

Christopher M. Abernathy, Austin, TX (US);

Mary D. Brown, Austin, TX (US);

Hung Q. Le, Austin, TX (US);

Dung Q. Nguyen, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A processor includes an instruction fetch unit, an issue queue coupled to the instruction fetch unit, an execution unit coupled to the issue queue, and a multi-level register file including a first level register file having lower access latency and a second level register file having higher access latency. Each of the first and second level register files includes a plurality of physical registers for holding operands that is concurrently shared by a plurality of threads. The processor further includes a mapper that, at dispatch of an instruction specifying a source logical register from the instruction fetch unit to the issue queue, initiates a swap of a first operand associated with the source logical register that is in the second level register file with a second operand held in the first level register file. The issue queue, following the swap, issues the instruction to the execution unit for execution.


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