The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2014

Filed:

Dec. 30, 2011
Applicants:

Jung-hwan Kim, Seoul, KR;

Sung-ho Heo, Suwon-si, KR;

Jae-ho Choi, Busan, KR;

Hun-hyeong Lim, Hwaseong-si, KR;

Ki-hyun Hwang, Seongnam-si, KR;

Woo-sung Lee, Yongin-si, KR;

Inventors:

Jung-Hwan Kim, Seoul, KR;

Sung-Ho Heo, Suwon-si, KR;

Jae-Ho Choi, Busan, KR;

Hun-Hyeong Lim, Hwaseong-si, KR;

Ki-Hyun Hwang, Seongnam-si, KR;

Woo-Sung Lee, Yongin-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a gate structure includes forming a tunnel insulation layer pattern on a substrate, forming a floating gate on the tunnel insulation layer pattern, forming a dielectric layer pattern on the floating gate, the dielectric layer pattern including a first oxide layer pattern, a nitride layer pattern on the first oxide layer pattern, and a second oxide layer pattern on the nitride layer pattern, the second oxide layer pattern being formed by performing an anisotropic plasma oxidation process on the nitride layer, such that a first portion of the second oxide layer pattern on a top surface of the floating gate has a larger thickness than a second portion of the second oxide layer pattern on a sidewall of the floating gate, and forming a control gate on the second oxide layer.


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