The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2014
Filed:
Jan. 12, 2012
John E. Barwin, Essex Junction, VT (US);
Amol A. Joshi, Essex Junction, VT (US);
Baozhen LI, South Burlington, VT (US);
Michael R. Ouellette, Westford, VT (US);
John E. Barwin, Essex Junction, VT (US);
Amol A. Joshi, Essex Junction, VT (US);
Baozhen Li, South Burlington, VT (US);
Michael R. Ouellette, Westford, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Disclosed is an integrated circuit design method that determines maximum direct currents for metal components and uses them as design constraints in the design flow in order to avoid/minimize electromigration failures. Short and long metal components are treated differently for purposes of establishing the design constraints. For a short metal component, the maximum direct current as a function of a given temperature for a given expected lifetime of the integrated circuit is determined, another maximum direct current is determined based on the Blech length, and the higher of these two is selected and used as the design constraint for that short metal component. For a long metal component, only the maximum direct current as a function of the given temperature for the given expected lifetime is determined and used as the design constraint. Also disclosed herein are associated system and program storage device embodiments for designing an integrated circuit.