The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2014

Filed:

Jul. 29, 2011
Applicants:

Kaushik Barman, Hyderabad, IN;

Heramba Aligave, Hyderabad, IN;

Sarvendra Govindammagari, Hyderabad, IN;

Inventors:

Kaushik Barman, Hyderabad, IN;

Heramba Aligave, Hyderabad, IN;

Sarvendra Govindammagari, Hyderabad, IN;

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and circuits process a data block of first bits. A circuit includes a register and a parallel combiner. The register is configured to store second bits. The second bits are iteratively a partial parity for each of multiple frames of the data block. The parallel combiner is coupled to the register and configured to generate a combination of bits from third bits and the second bits from the register. These third bits are iteratively those of the first bits within each of the frames of the data block. The circuit also includes respective exclusive-or circuits associated with the second bits. These exclusive-or circuits are coupled to the parallel combiner and the register. The respective exclusive-or circuit for each second bit is configured to generate the second bit from the combination of bits.


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